Sami Yehia
Senior Research Engineer in Computer Architecture,
Thales Research and Technology
RESEARCH INTERESTS
- Computer achitectures, compilers and embedded systems, more specifically
- Architecture Specialization and Instruction set customization, transparent customization.
- Multicore architectures and heterogeneous parallel systems.
- Parallel programming models.
- SIMD architectures.
EDUCATION
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Ph.D. in Computer Science, Computer Architecture, Paris-Sud (Paris XI)
University, Orsay, France. September 2004
Ph.D. Thesis Title: "Alternative Approaches to
Improve Performance without ILP"
Defense Jury: André SEZNEC (IRISA/INRIA),
Sanjay PATEL (University of Illinois at Urbana Champaign), Marc
DURANTON (Philips Research) and Olivier TEMAM ( Paris-Sud XI University)
September 2004, Advisor: Professor Olivier Temam.
- Master Degree in Parallel Architectures, Paris-Sud University, Orsay,
France. July 2000
"Méthodologie d'évaluation des
architectures des processeurs," Advisor: Professor Olivier Temam.
Major on writing exams.
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Master Degree In Computer Engineering, Arab Academy for Science and
Technology, Alexandria, Egypt. September 1999
Master Thesis title: "Architectural Level Synthesis
in A Reconfigurable Environment," Advisors: Dr. Yasser Y.
Hanafy and Professor Youssry Y. El Gamal.
GPA: 4.0/4.0.
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BSc in Computer Science and Automatic Control. Faculty of Engineering,
Alexandria University. June 1995
Excellent with degree of honor ranked 5th
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General Certificate of Egypt. July 1990)
Grade: 92.75/100, Ranked among the top 100 (about
250000 candidates).
PUBLICATIONS
Conferences and Workshops
- Sami Yehia, Sylvain Girbal, Hugues Berry, and Olivier Temam, "Reconciling Specialization and Flexibility Through Compound Circuits," International Symposium on High-Performance Computer Architecture (HPCA), February 2009.
- Nathan Clark, Amir Hormati, Scott Mahlke, Sami Yehia, and Krisztian Flautner, "Liquid SIMD: Abstracting SIMD Hardware Using Lightweight Dynamic Mapping," International Symposium on High-Performance Computer Architecture (HPCA), February 2007. Highest ranked paper of 174 submissions
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Nathan Clark, Amir Hormati, Scott Mahlke, and Sami
Yehia, "Scalable Subgraph Mapping for Acyclic Computation
Accelerators," International Conference on Compilers, Architecture, and
Synthesis for Embedded Systems (CASES), October 2006.
- Sami Yehia, Nathan Clark, Scott Mahlke, and
Krisztian Flautner, "Exploring the Design Space of LUT-based
Transparent Accelerators, International Conference on Compilers,
Architecture, and Synthesis for Embedded Systems (CASES), September
2005. Best Paper Award.
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Jean-Francois Collard, Norm Jouppi and Sami Yehia,
"System-Wide Performance Monitors and their Application to the
Optimization of Coherent Memory Accesses," ACM SIGPLAN Symposium on
Principles and Practice of Parallel Programming (PPOPP'05), June 2005.
- Sami Yehia, Jean-François Collard and
Olivier Temam, "Load Squared: Adding Logic Close to Memory to Reduce
the Latency of Indirect Loads with High Miss Ratios, MEDEA Workshop,
held in conjunction with the International Conference of Parallel
Architectures and Compilation Techniques (PACT), October 2005.
- Sami Yehia and Olivier Temam, "From Sequences of
Dependent Instructions to Functions: An Approach for Improving
Performance without ILP or Speculation," 31th Annual International
Symposium on Computer Architecture (ISCA), June 2004.
- Sami Yehia and Olivier Temam, "From Sequences of
Dependent Instructions to Functions: A Complexity Effective Approach
for Improving Performance without ILP or Speculation," 4th Workshop on
Complexity-effective Design (WCED) held in conjunction with the 30th
Annual International Symposium on Computer Architecture (ISCA), June
2003.
- Sami Yehia and Yasser Y. Hanafy, "Optimal Module
Selection and Scheduling of Dynamically Reconfigurable Processors, 9th
International Conference on Computer Theory and applications (ICCTA'
99), 1999, Alexandria Egypt.
Journal papers
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Sami Yehia, Jean-François Collard and
Olivier Temam, "Load Squared: Adding Logic Close to Memory to Reduce
the Latency of Indirect Loads in Embedded and General Systems," Journal
of Embedded Computing (JEC), Volume 2, Number 1, January 2006, IOS
Press.
Other posters and talks
- Marios Kleanthous, Sami Yehia, Yiannakis Sazeides, Emre Ozer, "A Replacement
Policy Based on Dynamic Profiling and Hashed Information," Third International Summer School on
Advanced Computer Architecture and Compilation for Embedded Systems (ACACES), July 2007.
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Philippe Bonnot, Sami Yehia, Arnaud Grasset, Eric Lenormand, Gilbert Edelin, "Mapping high performance and mission-critical applications to Embedded Architectures," 4th HiPEAC Industrial Workshop on Compilers and Architectures, November 2007
WORK EXPERIENCE
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Currently Senior Research engineer at Thales Research & Technology (since April 2007) -
Embedded Syslem Lab - Research engineer in the
field of processor architecture.
- Senior Research Engineer at ARM ltd, Cambridge, UK. From October 2004
to April 2007. Research engineer in processor architecture, R
& D division
- Summer Internship at HP Palo Alto, CA - System Architecture Department. From July 2004 to October 2004.
- Teaching Assistant (ATER) - Computer Science, Paris-Sud University,
Orsay, France. From October 2003 to July 2004.
Courses: Computer Architecture, Unix, Java Programming (Project).
- Teaching Assistant (Moniteur) - Computer Science, Paris-Sud University,
Orsay, France. From October 2000 to August 2003.
Courses: Principles of languages interpretation,
Functional programming, Digital logic, Computer Architecture.
- Teaching Assistant - Arab Academy for science and technology, College
of engineering, Department of computer engineering. From October 1995
to June 1999.
Courses: Programming (Basic, Pascal, C), Object
Oriented design, Numerical analysis, Computer Architecture, Databases,
Data structures, Operating systems, Discrete mathematics, Digital
design and software engineering.
- Part time Instructor - American University of Cairo, Branch of
Alexandria From 1996 to 1999
Courses: Ms-Word, MS-Access, MS-DOS, Introduction
to Computers, Windows95, PASCAL, C Programming Language, Operating
Systems, Numerical Analysis.
- Design and development of an Accounting database under Visual Basic
6.0, MS-SQL server 7.0, for Salamarine Egypt, 1999.
- Participate in the design and development of a shipping and container database under
MS-Access, for Marina Shipping Agency, 1998.
- Participate in the installation and starting of a Cyber- Café, Access Cyber
Café in Alexandria, 1996.
- BSc Project: Digital control of a heat rig, under Borland C++ , 1995.
- Summer Internship Training at WEPCO (Western Desert Operating Petroleum
Co.), 1993.
- Summer Internship at ANACAD Computer Systems, Grenoble, France, 1992.
OTHER RESEARCH ACTIVITIES
- Member of the HiPEAC Network and member of its
Industrial Advisory Board
- Technical Program Committee Member
- ICCD 2008 (IEEE International Conference on Computer Design - Processor Architecture Track)
- SASP 2008 (IEEE Symposium on Application Specific
Processors)
- SAMOS 2008 (International Symposium on Systems,
Architectures, MOdeling and Simulation)
- IFMT 2008 (First International Forum on Next-Generation
Multicore/Manycore Technologies)
- ICCD 2007 (IEEE International Conference on Computer Design)
- WASP 2008 (IEEE Workshop on Application Specific
Processors)
- CASES 2007 (International Conference on Compilers,
Architecture, and Synthesis for Embedded Systems).
- IISWC 2007 (IEEE International Symposium on Workload Characterization - benchmark committee)
- CASES 2006 (International Conference on Compilers,
Architecture, and Synthesis for Embedded Systems).
- ARCS 2006 (Architectures of Systems and Compilers).
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Reviewer for International Conferences and
workshops: ISPASS 2004, ASPLOS 2004, LCTES 2005, PACT 2005, CODES+ISSS
2005, CASES 2005, HIPEAC 2005, MOBS 2006, WASP 2006, DATE 2006, ISCA
2006, MICRO 2006, DATE 2007, HiPEAC 2007, CGO 2008, HPCA 2008.
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Reviewer for International Journals: JSA (Journal
of Systems and Architectures), IEEE TCAD Transactions; ACM
Transactions on Architecture and Code Optimization (TACO), IEEE Transaction on Very Large Scale Integration systems, Transactions on High-Performance Embedded Architectures and Compilers (HiPEAC).
OTHER TRAINING AND COURSES
- Business Development and Growth - Holden Intl - April 2007
- ARM RealView Soc Designer (MaxSim™) - 2006
- Time Management - Cambrdge, UK - December 2006
- Course at MICROSOFT Egypt: Microsoft SQL SERVER - System Administration
(6 days), 1999.
COMPUTER AND LANGUAGE SKILLS
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Languages: C, C++, PROLOG, SQL,
HTML, VBA, Pascal, Basic, Java, CAML, Perl, Php scripting
languages, Verilog Hardware Language..
- Software and tools: Xilinx
Foundation Series, Visual Studio, Word, Excel , Access, Power Point, MS
SQL Server, FrontPage, PVM, ARM RealView Soc Designer (Max,Sim™),
ARM RealView Core Generator (MaxCore™), Synopsys synthesis tools.
LANGUAGES
- French: Native language
- English: Fluent
- Arabic: Fluent
OTHERS
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GRE:Graduate Record Examination, ETS (1996).
- Verbal: 410 (29% below).
- Quantitative: 760 (92% below).
- Analytical: 710 (88% below)
- Subject (Computer Science) : 760 (82% below)
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TOEFEL: Test of English As A Foreign Language, ETS
Score : 637 (old score scale in 1996 = 270 on new scale)